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low power, precision rail-to-rail output op amp ad8622/ad8624 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2009C2010 analog devices, inc. all rights reserved. features very low offset voltage 125 v maximum supply current: 215 a/amp typical input bias current: 200 pa maximum low input offset voltage drift: 1.2 v/c maximum very low voltage noise: 11 nv/hz operating temperature: ?40c to +125c rail-to-rail output swing unity gain stable 2.5 v to 15 v operation applications portable precision instrumentation laser diode control loops strain gage amplifiers medical instrumentation thermocouple amplifiers general description the ad8622/ad8624 are dual and quad precision rail-to-rail output operational amplifiers with low supply currents of only 350 a/amplifier maximum over temperature and supply voltages. the ad8622/ad8624 also has an input bias current cancellation circuitry that provides a very low input bias current over the full operating temperature. with a typical offset voltage of only 10 v, offset drift of 0.5 v/c, and noise of only 0.2 v p-p (0.1 hz to 10 hz), they are perfectly suited for applications where large error sources cannot be tolerated. many systems can take advantage of the low noise, dc precision, and rail-to-rail output swing provided by the ad8622/ad8624 to maximize the signal-to-noise ratio and dynamic range for low power operation. the ad8622/ ad8624 are specified for the extended industrial temperature range of ?40c to +125c. the ad8622 is available in lead-free 8-lead soic and msop packages, while the ad8624 is available in lead-free 14-lead tssop and 16-lead lfcsp packages. pin configurations out a 1 ?in a 2 +in a 3 v? 4 v+ 8 out b 7 ?in b 6 +in b 5 ad8622 top view (not to scale) 07527-001 figure 1. 8-lead narrow-body soic o ut a 1 ?in a 2 +in a 3 v? 4 v+ 8 out b 7 ?in b 6 +in b 5 ad8622 top view (not to scale) 0 7527-002 figure 2. 8-lead msop 07527-067 ad8624 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view (not to scale) out a out d ?in d +in d v? +in c ?in c out c ?in a +in a v+ +in b ?in b out b figure 3. 14-lead tssop 07527-068 notes 1. nc = no connect. 2. it is recommended that the exposed pad be connected to v?. 12 11 10 1 3 4 ?in d +in d v? 9 +in c ?in a v+ 2 +in a +in b 6 o u t b 5 ? i n b 7 o u t c 8 ? i n c 1 6 n c 1 5 o u t a 1 4 o u t d 1 3 n c top view (not to scale) ad8624 figure 4. 16-lead lfcsp table 1. low power op amps supply 40 v 36 v 12 v to 18 v 6 v single op97 op777 ad8663 op1177 dual op297 op727 ad8667 ada4692-2 op2177 quad op497 op747 ad8669 ada4692-4 op4177
ad8622/ad8624 rev. b | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 pin configurations ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics2.5 v operation .......................... 3 electrical characteristics15 v operation ........................... 4 absolute maximum ratings ............................................................ 5 thermal resistance ...................................................................... 5 esd caution...................................................................................5 typical performance characteristics ..............................................6 applications information .............................................................. 15 input protection ......................................................................... 15 phase reversal ............................................................................ 15 micropower instrumentation amplifier ................................. 15 hall sensor signal conditioning .............................................. 16 simplified schematic ...................................................................... 17 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 19 revision history 2/10rev. a to rev. b changed 16-lead to 14-lead in figure 62 caption ................... 19 1/10rev. 0 to rev. a added 14-lead tssop ...................................................... universal added 16-lead lfcsp ....................................................... universal added figure 3 and figure 4; renumbered sequentially ........... 1 changes to table 5 ............................................................................ 5 changes to figure 10 to figure 16 .................................................. 6 changes to figure 26 ........................................................................ 9 changes to figure 29 ...................................................................... 10 updated outline dimensions ....................................................... 18 changes to ordering guide .......................................................... 19 7/09revision 0: initial version
ad8622/ad8624 rev. b | page 3 of 20 specifications electrical characteristics2.5 v operation v sy = 2.5 v, v cm = 0 v, t a = 25c, unless otherwise specified. table 2. parameter symbol conditions min typ max unit input characteristics offset voltage v os 10 125 v ?40c t a +125c 230 v offset voltage drift v os /t ?40c t a +125c 0.5 1.2 v/c input bias current i b 30 200 pa ?40c t a +125c 400 pa input offset current i os 25 200 pa ?40c t a +125c 300 pa input voltage range ?40c t a +125c ?1.3 +1.3 v common-mode rejection ratio cmrr v cm = ?1.3 v to +1.3 v 110 120 db ?40c t a +125c 107 db open-loop gain a vo r l = 10 k, v o = ?2.0 v to +2.0 v 118 135 db ?40c t a +125c 109 db input resistance, differential mode r indm 1 g input resistance, common mode r incm 1 t input capacitance, differential mode c indm 5.5 pf input capacitance, common mode c incm 3 pf output characteristics output voltage high v oh r l = 100 k to ground 2.45 2.49 v ?40c t a +125c 2.41 v r l = 10 k to ground 2.40 2.45 v ?40c t a +125c 2.36 v output voltage low v ol r l = 100 k to ground ?2.49 ?2.45 v ?40c t a +125c ?2.41 v r l = 10 k to ground ?2.45 ?2.40 v ?40c t a +125c ?2.36 v short-circuit current i sc 30 ma closed-loop output impedance z out f = 1 khz, a v = 1 2 power supply power supply rejection ratio psrr v s = 2.0 v to 18.0 v 125 145 db ?40c t a +125c 120 db supply current/amplifier i sy i o = 0 ma 175 225 a ?40c t a +125c 310 a dynamic performance slew rate sr r l = 10 k, c l = 100 pf a v = 1 0.28 v/s gain bandwidth product gbp r l = 10 k, c l = 20 pf, a v = 1 540 khz phase margin m r l = 10 k, c l = 20 pf, a v = 1 74 degrees noise performance voltage noise e n p-p f = 0.1 hz to 10 hz 0.2 v p-p voltage noise density e n f = 1 khz 12 nv/hz uncorrelated current noise density i n_uncorr f = 1 khz 0.15 pa/hz correlated current noise density i n_corr f = 1 khz 0.07 pa/hz
ad8622/ad8624 rev. b | page 4 of 20 electrical characteristics15 v operation v sy = 15 v, v cm = 0 v, t a = 25c, unless otherwise specified. table 3. parameter symbol conditions min typ max unit input characteristics offset voltage v os 10 125 v ?40c t a +125c 230 v offset voltage drift v os /t ?40c t a +125c 0.5 1.2 v/c input bias current i b 45 200 pa ?40c t a +125c 500 pa input offset current i os 35 200 pa ?40c t a +125c 500 pa input voltage range ?13.8 +13.8 v common-mode rejection ratio cmrr v cm = ?13.8 v to +13.8 v 125 135 db ?40c t a +125c 112 db open-loop gain a vo r l = 10 k, v o = ?13.5 v to +13.5 v 125 137 db ?40c t a +125c 120 db input resistance, differential mode r indm 1 g input resistance, common mode r incm 1 t input capacitance, differential mode c indm 5.5 pf input capacitance, common mode c incm 3 pf output characteristics output voltage high v oh r l = 100 k to ground 14.94 14.97 v ?40c t a +125c 14.84 v r l = 10 k to ground 14.86 14.89 v ?40c t a +125c 14.75 v output voltage low v ol r l = 100 k to ground ?14.97 ?14.94 v ?40c t a +125c ?14.92 v r l = 10 k to ground ?14.89 ?14.90 v ?40c t a +125c ?14.80 v short-circuit current i sc 40 ma closed-loop output impedance z out f = 1 khz, a v = 1 1.5 power supply power supply rejection ratio psrr v s = 2.0 v to 18.0 v 125 145 db ?40c t a +125c 120 db supply current/amplifier i sy i o = 0 ma 215 250 a ?40c t a +125c 350 a dynamic performance slew rate sr r l = 10 k, c l = 100 pf, a v = 1 0.48 v/s gain bandwidth product gbp r l = 10 k, c l = 20 pf, a v = 1 560 khz phase margin m r l = 10 k, c l = 20 pf, a v = 1 75 degrees noise performance voltage noise e n p-p f = 0.1 hz to 10 hz 0.2 v p-p voltage noise density e n f = 1 khz 11 nv/hz uncorrelated current noise density i n_uncorr f = 1 khz 0.15 pa/hz correlated current noise density i n_corr f = 1 khz 0.06 pa/hz
ad8622/ad8624 rev. b | page 5 of 20 absolute maximum ratings table 2. parameter rating supply voltage 18 v input voltage v sy input current 1 10 ma differential input voltage 2 10 v output short-circuit duration to gnd indefinite storage temperature range ?65c to +150c operating temperature range ?40c to +125c junction temperature range ?65c to +150c lead temperature (soldering, 60 sec) 300c thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. this was measured using a standard 4-layer board. table 3. thermal resistance package type ja jc unit 8-lead soic_n (r-8) 120 45 c/w 8-lead msop (rm-8) 142 45 c/w 14-lead tssop (ru-14) 112 35 c/w 16-lead lfcsp (cp-16-17) 55 14 c/w 1 the input pins have clamp diodes to the power supply pins. the input current should be limited to 10 ma or less whenever input signals exceed the power supply rail by 0.5 v. esd caution 2 differential input voltage is limited to 10 v or the supply voltage, whichever is less. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ad8622/ad8624 rev. b | page 6 of 20 typical performance characteristics t a = 25c, unless otherwise noted. 60 50 40 30 20 10 0 ?100 ?80 ?60 ?40 ?20 0 20 40 60 80 100 v os (v) number of amplifiers 07527-065 v sy = 2.5v v cm = 0v figure 5. input offset voltage distribution 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 tcv os (v/c) number of amplifiers 07527-066 v sy = 2.5v ?40c t a +125c figure 6. input offset voltage drift distribution 50 40 30 20 10 0 ?10 ?20 ?30 ?40 ?50 ?2.5 ?1.5 ?0.5 0.5 1.5 2.5 v cm (v) v os (v) 07527-007 +85c +25c ?40c +125c v sy = 2.5v figure 7. input offset voltage vs. common-mode voltage 60 50 40 30 20 10 0 ?100 ?80 ?60 ?40 ?20 0 20 40 60 80 100 v os (v) number of amplifiers 07527-063 v sy = 15v v cm = 0v figure 8. input offset voltage distribution 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 tcv os (v/c) number of amplifiers 07527-064 v sy = 15v ?40c t a +125c figure 9. input offset voltage drift distribution 50 40 30 20 10 0 ?10 ?20 ?30 ?40 ?50 ?15 ?10 ?5 0 5 10 +15 v cm (v) v os (v) 07527-004 v sy = 15v +85c +25c ?40c +125c figure 10. input offset voltage vs. common-mode voltage
ad8622/ad8624 rev. b | page 7 of 20 i b (pa) 07527-008 temperature (c) ?60 ?50 ?40 ?30 ?20 ?10 0 ?50 ?25 0 25 50 75 100 125 i b + i b ? v sy = 2.5v figure 11. input bias current vs. temperature ?150 ?125 ?100 ?75 ?50 ?25 0 25 50 ?2.5 ?1.5 ?0.5 0.5 1.5 2.5 v sy = 2.5v 07527-012 v cm (v) i b (pa) figure 12. input bias current vs. common-mode voltage 100 10 1 0.1 0.01 0.001 0.01 0.1 1 10 100 load current (ma) output voltage to supply rail (v) 07527-013 v sy = 2.5v v cc ? v oh v ol ? v ee figure 13. output voltage to supply rail vs. load current 07527-011 temperature (c) i b (pa) ?50 ?40 ?30 ?20 ?10 0 10 ?50 ?25 0 25 50 75 100 125 i b + i b ? v sy = 15v figure 14. input bias current vs. temperature ?60 ?40 ?20 0 20 40 60 ?15 ?10 ?5 0 5 10 15 v sy = 15v 07527-009 v cm (v) i b (pa) figure 15. input bias current vs. common-mode voltage 0.01 0.1 1 10 100 load current (ma) output voltage to supply rail (v) 07527-010 v sy = 15v v cc ? v oh v ol ? v ee 100 10 1 0.1 0.01 0.001 figure 16. output voltage to supply rail vs. load current
ad8622/ad8624 rev. b | page 8 of 20 0.06 0.05 0.04 0.03 0.02 0.01 0 ?50 ?25 0 25 50 75 100 125 temperature (c) output voltage to supply rail (v) 07527-017 v sy = 2.5v r l = 10k ? v cc ? v oh v ol ? v ee figure 17. output voltage to supply rail vs. temperature 0.30 0.25 0.20 0.15 0.10 0.05 0 0.35 ?0.05 0 2 4 6 8 10 12 14 16 18 v sy (v) i sy (ma) 07527-044 +85c +25c ?40c +125c figure 18. supply current vs. supply voltage 100 80 60 40 20 0 ?20 ?40 100 80 60 40 20 0 ?20 ?40 1k 10k 100k 1m 10m frequency (hz) gain (db) phase (degrees) 07527-018 v sy = 2.5v r l = 10k ? phase gain figure 19. open-loop gain and phase vs. frequency 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 ?50 ?25 0 25 50 75 100 125 temperature (c) output voltage to supply rail (v) 07527-014 v cc ? v oh v ol ? v ee v sy = 15v r l = 10k ? figure 20. output voltage to supply rail vs. temperature 0.30 0.25 0.20 0.15 0.10 0.05 0.35 25 ?25 ?50 50 0 75 100 125 temperature (c) i sy (ma) 07527-045 v sy = 15v v sy = 2.5v figure 21. supply current vs. temperature 100 80 60 40 20 0 ?20 ?40 100 80 60 40 20 0 ?20 ?40 1k 10k 100k 1m 10m frequency (hz) gain (db) phase (degrees) 07527-015 v sy = 15v r l = 10k ? phase gain figure 22. open-loop gain and phase vs. frequency
ad8622/ad8624 rev. b | page 9 of 20 60 50 40 30 20 10 0 ?10 ?20 ?30 ?40 100 1k 10k 100k 1m 10m frequency (hz) gain (db) 07527-019 v sy = 2.5v r l = 10k ? a v = 100 a v = 10 a v = 1 figure 23. closed-loop gain vs. frequency 10k 1k 100 10 1 0.1 100 1k 10k 100k 1m frequency (hz) z out ( ? ) 07527-023 v sy = 2.5v a v = 100 a v = 10 a v = 1 figure 24. output im pedance vs. frequency 140 120 100 80 60 40 20 0 frequency (hz) cmrr (db) 07527-021 v sy = 2.5v 10 100 1k 10k 100k 1m figure 25. cmrr vs. frequency 60 50 40 30 20 10 0 ?10 ?20 ?30 ?40 100 1k 10k 100k 1m 10m frequency (hz) gain (db) 07527-016 v sy = 15v r l = 10k ? a v = 100 a v = 10 a v = 1 figure 26. closed-loop gain vs. frequency 10k 1k 100 10 1 0.1 100 1k 10k 100k 1m frequency (hz) z out ( ? ) 07527-020 v sy = 15v a v = 100 a v = 10 a v = 1 figure 27. output im pedance vs. frequency 140 120 100 80 60 40 20 0 10 100 1k 10k 100k 1m frequency (hz) cmrr (db) 07527-024 v sy = 15v figure 28. cmrr vs. frequency
ad8622/ad8624 rev. b | page 10 of 20 120 100 80 60 40 20 0 10 100 1k 10k 100k 1m frequency (hz) psrr (db) 07527-025 v sy = 2.5v psrr+ psrr? figure 29. psrr vs. frequency 50 45 40 35 25 15 5 30 20 10 0 0.01 0.1 1 10 100 capacitance (nf) overshoot (%) 07527-029 v sy = 2.5v a v = 1 r l = 10k ? os+ os? figure 30. small-signal overshoot vs. load capacitance 07527-030 time (40s/div) voltage (500mv/div) v sy = 2.5v a v = 1 r l = 10k ? c l = 100pf figure 31. large-signal transient response 120 100 80 60 40 20 0 10 100 1k 10k 100k 1m frequency (hz) psrr (db) 07527-022 v sy = 15v psrr+ psrr? figure 32. psrr vs. frequency 50 45 40 35 25 15 5 30 20 10 0 0.01 0.1 1 10 100 capacitance (nf) overshoot (%) 07527-026 v sy = 15v a v = 1 r l = 10k ? os+ os? figure 33. small-signal overshoot vs. load capacitance 07527-027 time (40s/div) voltage (5v/div) v sy = 15v a v = 1 r l = 10k ? c l = 100pf figure 34. large-signal transient response
ad8622/ad8624 rev. b | page 11 of 20 07527-031 time (10s/div) voltage (50mv/div) v sy = 2.5v a v = 1 r l = 10k ? c l = 100pf figure 35. small-signal transient response 07527-035 time (20s/div) 0.4 0.2 0 0 ?1 ?2 ?3 input voltage (v) output voltage (v) v sy = 2.5v a v = ?100 r l = 10k ? input output figure 36. negative overload recovery 07527-036 time (20s/div) 0.2 0 ?0.2 2 3 1 0 ?1 input voltage (v) output voltage (v) v sy = 2.5v a v = ?100 r l = 10k ? input output figure 37. positive overload recovery 07527-028 time (10s/div) voltage (50mv/div) v sy = 15v a v = 1 r l = 10k ? c l = 100pf figure 38. small-signal transient response 07527-032 time (20s/div) 0.4 0.2 0 0 ?10 ?20 input voltage (v) output voltage (v) v sy = 15v a v = ?100 r l = 10k ? input output figure 39. negative overload recovery 07527-033 time (20s/div) 0.2 0 ?0.2 10 20 0 ?10 ?20 input voltage (v) output voltage (v) v sy = 15v a v = ?100 r l = 10k ? input output figure 40. positive overload recovery
ad8622/ad8624 rev. b | page 12 of 20 12 10 8 6 4 2 0 0 5 10 15 0.1% 0.01% 20 25 30 35 settling time (s) output step (v) 07527-034 v sy = 15v a v = ?1 figure 41. output step vs. settling time 100 10 1 1 10 100 1k frequency (hz) voltage noise density (nv/ hz) 07527-042 v sy = 2.5v figure 42. voltage noise density vs. frequency 1 0.1 0.01 1 10 100 1k frequency (hz) current noise density (pa/ hz) 07527-057 v sy = 2.5v uncorrelated r s1 = 0 ? correlated r s1 = r s2 r s1 r s2 figure 43. current noise density vs. frequency 12 10 8 6 4 2 0 0 5 10 15 0.1% 0.01% 20 25 30 35 settling time (s) output step (v) 07527-037 v sy = 15v a v = +1 figure 44. output step vs. settling time 100 10 1 1 10 100 1k frequency (hz) voltage noise density (nv hz) 07527-039 v sy = 15v figure 45. voltage noise density vs. frequency 1 0.1 0.01 11 01 0 0 frequency (hz) current noise density (pa/ 1 k hz) 07527-056 v sy = 15v uncorrelated r s1 = 0 ? correlated r s1 = r s2 r s1 r s2 figure 46. current noise density vs. frequency
ad8622/ad8624 rev. b | page 13 of 20 07527-043 time (1s/div) input noise voltage (50nv/div) v sy = 2.5v figure 47. 0.1 hz to 10 hz noise 1 0.1 0.01 0.001 0.0001 0.001 0.01 0.1 1 10 amplitude (v rms) thd + n (%) 07527-049 v sy = 2.5v f = 1khz r l = 10k ? figure 48. thd + noise vs. amplitude 07527-040 time (1s/div) input noise voltage (50nv/div) v sy = 15v figure 49. 0.1 hz to 10 hz noise 1 0.1 0.01 0.001 0.0001 0.001 0.01 0.1 1 10 amplitude (v rms) thd + n (%) 07527-046 v sy = 15v f = 1khz r l = 10k ? figure 50. thd + noise vs. amplitude
ad8622/ad8624 rev. b | page 14 of 20 0.1 0.01 0.001 0.0001 10 100 1k 10k 100k frequency (hz) thd + n (%) 07527-051 v sy = 2.5v r l = 10k ? v in = 300mv rms figure 51. thd + noise vs. frequency 0 ?20 ?40 ?60 ?80 ?100 ?120 ?140 10 100 1k 10k 100k frequency (hz) channel separation (db) 07527-048 v sy = 2.5v to 15v r l = 10k ? a v = ?100 100k ? 1k? r l figure 52. channel separation vs. frequency 0.1 0.01 0.001 0.0001 10 100 1k 10k 100k frequency (hz) thd + n (%) 07527-050 v sy = 15v r l = 10k ? v in = 300mv rms figure 53. thd + noise vs. frequency
ad8622/ad8624 rev. b | page 15 of 20 applications information input protection the maximum differential input voltage that can be applied to the ad8622/ad8624 is determined by the internal diodes connected across its inputs and series resistors at each input. these internal diodes and series resistors limit the maximum differential input voltage to 10 v and are needed to prevent base- emitter junction breakdown from occurring in the input stage of the ad8622/ad8624 when very large differential voltages are applied. in addition, the internal resistors limit the currents that flow through the diodes. however, in applications where large differential voltages can be inadvertently applied to the device, large currents may still flow through these diodes. in such a case, external resistors must be placed at both inputs of the op amp to limit the input currents to 10 ma (see figure 54 ). ad862x 500? 500? r1 r2 2 3 1 07527-055 figure 54. input protection phase reversal an undesired phenomenon, phase reversal (also known as phase inversion) occurs in many op amps when one or both of the inputs are driven beyond the specified input voltage range (ivr), in effect reversing the polarity of the output. in some cases, phase reversal can induce lockups and even cause equipment damage as well as self destruction. the ad8622/ad8624 amplifiers have been carefully designed to prevent output phase reversal when both inputs are maintained within the specified input voltage range. in addition, even if one or both inputs exceed the input voltage range but remain within the supply rails, the output still does not phase reverse. figure 55 shows the input/output waveforms of the ad8622/ad8624 configured as a unity-gain buffer with a supply voltage of 15 v. 07527-053 time (200s/div) voltage (5v/div) v sy = 15v v out v in figure 55. no phase reversal micropower instrumentation amplifier the ad8622 is a dual, high precision, rail-to-rail output op amp operating at just 215 a quiescent current per amplifier. its ultralow offset, offset drift, and voltage noise, combined with its very low bias current and high common-mode rejection ratio (cmrr), are ideally suited for high accuracy and micropower instrumentation amplifier. figure 56 shows the classic 2-op-amp instrumentation amplifier with four resistors using the ad8622. the key to high cmrr for this instrumentation amplifier are resistors that are well matched from both the resistive ratio and the relative drift. for true difference amplification, matching of the resistor ratio is very important, where r3/r4 = r1/r2. assuming perfectly matched resistors, the gain of the circuit is 1 + r2/r1, which is approximately 100. tighter matching of two op amps in one package, like the ad8622, offers a significant boost in performance over the classical 3-op-amp configuration. overall, the circuit only requires about 430 a of supply current. +15v ?15v v2 v1 r1 10.1k ? r2 1m ? r3 10.1k ? r4 1m ? v o 07527-054 notes 1. v o = 100(v2 ? v1) 2. typical: 0.01mv < |v2 ? v1| < 149.7mv 3. typical: ?14.97v < v o < +14.97v 4. use matched resistors. 1/2 ad8622 + ? +15v ?15v 1/2 ad8622 + ? figure 56. micropower instrumentation amplifier
ad8622/ad8624 rev. b | page 16 of 20 hall sensor signal conditioning the ad8622/ad8624 is also highly suitable for high accuracy, low power signal conditioning circuits. one such use is in hall sensor signal conditioning (see figure 57 ). the magnetic sensitivity of a hall element is proportional to the bias voltage applied across it. with 1 v bias voltage, the hall element consumes about 2.5 ma of supply current and has a sensitivity of 5.5 mv/mt typical. to reduce power consumption, bias voltage must be reduced, but at the risk of lower sensitivity. the only way to achieve higher sensitivity is by introducing a gain using a precision micropower amplifier. the ad8622/ad8624, with all its features, is well suited to amplify the sensitivity of the hall element. the adr121 is a precision micropower 2.5 v voltage reference. a precision voltage reference is required to hold a constant current so that the hall voltage only depends on the intensity of the mag- netic field. using the 4.12k:98.8k resistive divider, the bias voltage of the hall element is reduced to 100 mv, leading to only 250 a of power consumption. the 3-op-amp in-amp configuration of the ad8622/ad8624 then increases the sensitivity to 55 mv/mt. the key to high cmrr for this in-amp configuration are resistors that are well matched (where r1/r2 = r3/r4) from both the resistive ratio and relative drift. the resistors are important in determining the performance over manufacturing tolerances, time and temperature. at least 1% or better resistors are recommended. using the ad8622/ad8624 to amplify the sensor signal can reduce power while also achieving higher sensitivity. the total current consumed is just 1.2 ma, resulting in 21 improvement in sensitivity/power. v sy v sy v sy r6 9.9k ? r3 9.9k ? r5 9.9k ? r1 9.9k ? r2 9.9k ? r7 200 ? r8 4.12k ? r9 98.8k ? r4 9.9k ? adr121 ? 2.5v 400 ? 4 hall element v out = 2.5v + magnetic field (mt) 55mv mt 07527-052 + ? + ? v sy ? + v sy ad862x ad862x ad862x ad862x ? + + c3 0.1f to 10f c2 0.1f c1 1f to 10f notes 1. use matched resistors for in-amp. 2. for information on c1, c2, and c3, refer to adr121 data sheet. figure 57. hall sensor signal conditioning
ad8622/ad8624 rev. b | page 17 of 20 simplified schematic input bias cancellation circuitry v b1 v b2 d1 d2 500 ? 500 ? +in x v + ?in x v? c1 q11 out x q12 q8 q9 q10 q5 q3 q2q1 q4 q6 q7 d4 d3 r1 r3 r2 07527-062 figure 58. simplified schematic
ad8622/ad8624 rev. b | page 18 of 20 outline dimensions compliant to jedec standards mo-187-aa 100709-b 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 figure 59. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 60. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches)
ad8622/ad8624 rev. b | page 19 of 20 2.70 2.60 sq 2.50 compliant to jedec standards mo-220-wggc. 012909-b 1 0.65 bsc bottom view top view 16 5 8 9 12 13 4 exposed pad p i n 1 i n d i c a t o r 4.10 4.00 sq 3.90 0.45 0.40 0.35 s eating plane 0.80 0.75 0.70 0.05 max 0.02 nom 0.20 ref 0.25 min coplanarity 0.08 pin 1 indicator 0.35 0.30 0.25 for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. figure 61. 16-lead lead frame chip scale package [lfcsp_wq] 4 mm 4mm body, very very thin quad (cp-16-17) dimensions shown in millimeters compliant to jedec standards mo-153-ab-1 061908-a 8 0 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 0.75 0.60 0.45 coplanarity 0.10 seating plane figure 62. 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding ad8622armz ?40c to +125c 8-lead msop rm-8 a1p ad8622armz-reel ?40c to +125c 8-lead msop rm-8 a1p ad8622armz-r7 ?40c to +125c 8-lead msop rm-8 a1p AD8622ARZ ?40c to +125c 8-lead soic_n r-8 AD8622ARZ-reel ?40c to +125c 8-lead soic_n r-8 AD8622ARZ-reel7 ?40c to +125c 8-lead soic_n r-8 ad8624acpz-r2 ?40c to +125c 16-lead lfcsp_wq cp-16-17 ad8624acpz-r7 ?40c to +125c 16-lead lfcsp_wq cp-16-17 ad8624acpz-rl ?40c to +125c 16-lead lfcsp_wq cp-16-17 ad8624aruz ?40c to +125c 14-lead tssop ru-14 ad8624aruz-rl ?40c to +125c 14-lead tssop ru-14 1 z = rohs compliant part.
ad8622/ad8624 rev. b | page 20 of 20 notes ?2009C2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d07527-0-2/10(b)

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